Avances en el desarrollo del ZX-Uno

[antoniovillena]

Desde luego que superfo va a preferir enrutar la LX9, no hay que reubicar nada, a no ser que quieras implementar HDMI. Meter una 500E en ese espacio tan reducido es bastante más complejo. Otra cosa buena que tiene la LX9 es el Multiboot, cosa que las 3e no permiten con SPI Flash.

[mcleod_ideafix]

Desde luego que superfo va a preferir enrutar la LX9, no hay que reubicar nada, a no ser que quieras implementar HDMI.

Va a ser que dejamos el HDMI para otra ocasión, ¿no?

[Hark0]

No os entiendo nada... PERO ME ENCANTA,

[aowen]

BTW, is Turbo Sound (dual AY) supported? If so are there any docs that describe how it works?

Por cierto. ¿Está soportado (supported) el Turbo sound (AY dual). En caso afirmativo, ¿Hay alguna documentación que describa cómo funciona?

[mcleod_ideafix]

BTW, is Turbo Sound (dual AY) supported? If so are there any docs that describe how it works?

That's my intention. Mmmm.... I recall there's some information at VELESOFT's : http://velesoft.speccy.cz/turbosound-cz.htm

-- Actualizado 23 Mar 2014, 14:38 --

DIVMMC need more than 32kB divide ram. Than number of 8kB ram pages is used in DIVMMC on ZX-UNO ? Original DIVMMC use only two memory sizes - 128kB sram(16x 8kB ram page) or 512kB sram(64x 8kB ram page).

¡¡AHORA SI!!


He modificado un poco el mapa de memoria de la SRAM utilizada. Bueno, en realidad lo he optimizado, que estaba hecho unos zorros. Ahora tenemos 128KB para la RAM del DIVMMC, y el botón NMI (recordad: Ctrl-Alt-F5) funciona estupendamente . He vuelto a subir el test12 con los cambios. OJO que también cambia un poco testrom.asm / testrom.tap (el programita que carga los firmwares) ya que hay que borrar otras secciones diferentes de la SRAM para que el arranque con DIVMMC sea "fresco". Cuando useis testrom.tap para cargar el firmware, por defecto carga la ROM estándar del 48K, con soporte de DIVMMC.

[VELESOFT]

Russian ZX clone AEON also support DIVMMC :
http://zx.pk.ru/showthread.php?t=21992

128kB ram is minimum for DIVMMC. Bigger memory (multiply of 128kB) will better for ESXDOS development...

ZX-UNO use 512kB sram chip:
- up to 64kB is used for ZX rom
- up to 128kB is used as ZX128 ram
- 8kB is used as DIVMMC ROM
- 128kB is used as DIVMMC ram pages (minimal configuration)
-----------------
total 328 kB

I see free 184 kB ram. Theoretically is possible increase DIVMMC ram to 256kB and next free ram for custom NMI menu or MULTIFACE emulation.

-- Actualizado 23 Mar 2014, 16:19 --

TURBO-SOUND function:

OUT 65533,255 (or power-on / reset) = AY port access work with primary AY chip
OUT 65533,254 = AY port access work with secondary AY chip

Both chips are reset after power-on or zx reset.
In one time is possible access only to one selected chip.
Both AY chips play separately.
OUT 65533,255/254 only is used for switch between AY chips and both AY chips ignore this writed data values (AY see this big values as "out of range" = unused)

It's all.

ZX-UNO use emulation of AY-3-891x or YM2149 ? YM2149 sounds not so good as AY.

[mcleod_ideafix]

I see free 184 kB ram. Theoretically is possible increase DIVMMC ram to 256kB and next free ram for custom NMI menu or MULTIFACE emulation.

Not so fast 128KB is reserved for the DOC and EX banks to implement the horizontal MMU needed for Chloe 280SE.

[VELESOFT]

ZX-UNO support +3 rom paging then is possible use +3e rom with ZXMMC SD ports.

Can anyone test this ?
http://velesoft.speccy.cz/other/plus3e_divmmc_001.zip
It's +3e rom image with rewrited ZXMMC ports to DIVMMC SD ports. For run this +3e rom version must be enable DIVMMC SD ports and disable DIVMMC memory. If is will work then ZXMMC support can be removed from ZX-UNO.

[mcleod_ideafix]

ZX-UNO support +3 rom paging then is possible use +3e rom with ZXMMC SD ports.

Yes. In fact, the SPI interface is available both at the ZXMMC port address and DIVMMC port address. Both work the same way, so I'm not duplicating logic: the same device is just accessed from two different I/O ports

Can anyone test this ?
http://velesoft.speccy.cz/other/plus3e_divmmc_001.zip
It's +3e rom image with rewrited ZXMMC ports to DIVMMC SD ports. For run this +3e rom version must be enable DIVMMC SD ports and disable DIVMMC memory. If is will work then ZXMMC support can be removed from ZX-UNO.

Isn't that the same thing Antonio Villena did about a month ago? Patching the +3e ROM to change ZXMMC address by DIVMMC addresses?
http://www.worldofspectrum.org/forums/s ... hp?t=46627

[VELESOFT]

ZX-UNO support +3 rom paging then is possible use +3e rom with ZXMMC SD ports.

Yes. In fact, the SPI interface is available both at the ZXMMC port address and DIVMMC port address. Both work the same way, so I'm not duplicating logic: the same device is just accessed from two different I/O ports

I know.

Can anyone test this ?
http://velesoft.speccy.cz/other/plus3e_divmmc_001.zip
It's +3e rom image with rewrited ZXMMC ports to DIVMMC SD ports. For run this +3e rom version must be enable DIVMMC SD ports and disable DIVMMC memory. If is will work then ZXMMC support can be removed from ZX-UNO.

Isn't that the same thing Antonio Villena did about a month ago? Patching the +3e ROM to change ZXMMC address by DIVMMC addresses?
http://www.worldofspectrum.org/forums/s ... hp?t=46627

I see my image have changed SD ports on same positions as in Antonio's version. But my image contain reverse I/O ports values (my bug).